Publications

Single-photon imaging detectors promise the ultimate in sensitivity by eliminating read noise. These devices could provide extraordinary benefits for photon-starved applications, e.g., imaging exoplanets, fast wavefront sensing, and probing the human body through transluminescence. Recent implementations are often in the form of sparse arrays that have less-than-unity fill factor. For...

We have demonstrated a wafer-scale back-illumination process for silicon Geiger-mode avalanche photodiode arrays using Molecular Beam Epitaxy (MBE) for backside passivation. Critical to this fabrication process is support of the thin ( 10 um) detector during the MBE growth by oxide-bonding to a full-thickness silicon wafer. This back-illumination process makes...

For adaptive optics systems, there is a growing demand for wavefront sensors that operate at higher frame rates and with more pixels while maintaining low readout noise. Lincoln Laboratory has been investigating Geiger·mode avalanche photodiode arrays integrated with CMOS readout circuits as a potential solution. This type of sensor counts...

We present a unique hybridization process that permits high-performance back-illuminated silicon Geiger-mode avalanche photodiodes (GM-APDs) to be bonded to custom CMOS readout integrated circuits (ROICs) - a hybridization approach that enables independent optimization of the GM-APD arrays and the ROICs. The process includes oxide bonding of silicon GM-APD arrays to...

We have developed a three-dimensional (3D) circuit integration technology that exploits the advantages of silicon-on-insulator (SOI) technology to enable wafer-level stacking and micrometer-scale electrical interconnection of fully fabricated circuit wafers. This paper describes the 3D technology and discusses some of the advanced focal plane arrays that have been built using...

The Los Alamos National Laboratory's Dual Axis Radiographic Hydrodynamic Test Facility (DARHT) generates flash radiographs of explosive experiments using two linear induction electron accelerators situated at right angles. The DARHT second axis accelerator generates an 18-MeV, 2 kA, 2 sec electron beam which is converted or "chopped" into four individual...

The dominant trend with conventional image sensors is toward scaled-down pixel sizes to increase spatial resolution and decrease chip size and cost. While highly capable chips, these monolithic image sensors devote substantial perimeter area to signal acquisition and control circuitry and trade off pixel complexity for fill factor. For applications...

A 64 x 64-pixel test circuit was designed and fabricated in 0.18- m CMOS technology for investigating high-speed imaging with large-format imagers. Several features are integrated into the circuit architecture to achieve fast exposure times with low-skew and jitter for simultaneous pixel snapshots. These features include an H-tree clock distribution...

We report an array of Shack-Hartmann wavefront sensors using high-fill-factor Geiger-mode avalanche detector quad cells hybridized to all-digital CMOS counting circuits. The absence of readout noise facilitates fast wavefront sensing at low light levels.

Introduction At Lincoln Laboratory, we have established a three dimensional (3D) integrated circuit (IC) technology that has been developed and demonstrated over seven designs, bonding two or three active circuit layers or tiers to form monolithically integrated 3D circuits. Key features of our 3DIC technology include fully depleted SOI (FDSOI)...