Publications

Advanced analog-optical sensor, signal processing and communication systems could benefit significantly from wideband (DC to > 50 GHz) optical modulators having both low half-wave voltage (V[pi]) and low optical insertion loss. An important figure-of-merit for modulators used in analog applications is TMAX/V[pi], where TMAX is the optical transmission of the modulator when biased for maximum transmission. Candidate electro-optic materials for realizing these modulators include lithium niobate (LiNbO3), polymers, and semiconductors, each of which has its own set of advantages and disadvantages. In this paper, we report the development of 1.5-um-wavelength Mach-Zehnder modulators utilizing the electrorefractive effect in InGaAsP/InP symmetric, uncoupled semiconductor quantum-wells. Modulators with 1-cm-long, lumped-element electrodes are found to have a push-pull V[pi] of 0.9V (V[pi]L = 9 V-mm) and 18-dB fiber-to-fiber insertion loss (TMAX/V[pi] = 0.018). Fabry-Perot cutback measurements reveal a waveguide propagation loss of 7 dB/cm and a waveguide-to-fiber coupling loss of 5 dB/facet. The relatively high propagation loss results from a combination of below-bandedge absorption and scattering due to waveguide-sidewall roughness. Analyses show that most of the coupling loss can be eliminated though the use of monolithically integrated invertedtaper optical-mode converters, thereby allowing these modulators to exceed the performance of commercial LiNbO3 modulators (TMAX/V[pi] ~ 0.1). We also report the analog modulation characteristics of these modulators.

A low-voltage (

We have developed a merged CCD/SOI-CMOS technology that enables the fabrication of monolithic, low-power imaging systems on a chip. The CCD's, fabricated in the bulk handle wafer, have charge-transfer inefficiencies of about 1x10(-5) and well capacities of more than 100,000 electrons with 3.3-V clocks and 8x8um pixels. Fully depleted 0.35pm SOI-CMOS ring oscillators have stage delay of 48ps at 3.3V. We demonstrate for the first time an integrated image sensor with charge-domain A/D conversion and on-chip clocking.

We have developed a process that monolithically integrates fully depleted SOI CMOS (FDSOI) with high-performance CCD image sensors. This integrated technology that enables charged-coupled devices (CCD's) to be in close proximity to, yet isolated from, FDSOI circuits. This approach exploits both the advantages of FDSOI (fast, low-power CMOS with potentially enhanced radiation performance) and those of CCD's (high quantum efftciency, low noise, and architectural flexibility). This 3.3 V, 0.3 mu m CCD/FDSOI-CMOS technology thus enables fabrication of low-power, compact imaging systems. Material requirements for CCD imagers are perhaps the most stringent of any device and require special attention to the quality of the bulk or handle wafer. We report here characterization of various SOI handle wafers for use in fabrication of bulk imaging devices.