Publications

MIT Lincoln Laboratory has developed InP/InGaAsP Geiger-Mode Avalanche Photodiodes and associated readout integrated circuits (ROICs) that have enabled numerous active optical systems over the past decade. Framed and asynchronous photon timing ROIC architectures have been demonstrated. In recent years, efforts at MITLL have focused on technology development to advance the state of the art of framed Gm APD FPAs and a 256x128 pixel FPA with on-chip data thinning has been demonstrated.

A model for the turn-on characteristics of separate-absorber-multiplier InP-based Geiger-mode Avalanche Photodiodes (APDs) has been developed. Verilog-A was used to implement the model in a manner that can be incorporated into circuit simulations. Rather than using SPICE elements to mimic the voltage and current characteristics of the APD, Verilog-A can represent the first order nonlinear differential equations that govern the avalanche current of the APD. This continuous time representation is fundamentally different than the piecewise linear characteristics of other models. The model is based on a driving term for the differential current, which is given by the voltage overbias minus the voltage drop across the device?s space-charge resistance RSC. This drop is primarily due to electrons transiting the separate absorber. RSC starts off high and decreases with time as the initial breakdown filament spreads laterally to fill the APD. With constant bias voltage, the initial current grows exponentially until space charge effects reduce the driving function. With increasing current the driving term eventually goes to zero and the APD current saturates. On the other hand, if the APD is biased with a capacitor, the driving term becomes negative as the capacitor discharges, reducing the current and driving the voltage below breakdown. The model parameters depend on device design and are obtained from fitting the model to Monte-Carlo turn-on simulations that include lateral spreading of the carriers of the relevant structure. The Monte-Carlo simulations also provide information on the probability of avalanche, and jitter due to where the photon is absorbed in the APD.

An asynchronous readout integrated circuit (ROIC) has been developed for hybridization to a 32x32 array of single-photon sensitive avalanche photodiodes (APDs). The asynchronous ROIC is capable of simultaneous detection and readout of photon times of arrival, with no array blind time. Each pixel in the array is independently operated by a finite state machine that actively quenches an APD upon a photon detection event, and re-biases the device into Geiger mode after a programmable hold-off time. While an individual APD is in hold-off mode, other elements in the array are biased and available to detect photons. This approach enables high pixel refresh frequency (PRF), making the device suitable for applications including optical communications and frequency-agile ladar. A built-in electronic shutter that de-biases the whole array allows the detector to operate in a gated mode or allows for detection to be temporarily disabled. On-chip data reduction reduces the high bandwidth requirements of simultaneous detection and readout. Additional features include programmable single-pixel disable, region of interest processing, and programmable output data rates. State-based on-chip clock gating reduces overall power draw. ROIC operation has been demonstrated with hybridized InP APDs sensitive to 1.06-Mm and 1.55-Mm wavelength, and fully packaged focal plane arrays (FPAs) have been assembled and characterized.