A polyphase nonlinear equalization architecture and semi-blind identification method
October 26, 2008
Conference Paper
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Published in:
42th Asilomar Conf. on Signals, Systems, and Computers, 27 October 2008, pp. 593-597.
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Summary
In this paper, we present an architecture and semiblind identification method for a polyphase nonlinear equalizer (pNLEQ). Such an equalizer is useful for extending the dynamic range of time-interleaved analog-to-digital converters (ADCs). Our proposed architecture is a polyphase extension to other architectures that partition the Volterra kernel into small nonlinear filters with relatively low computational complexity. Our semi-blind identification technique addresses important practical concerns in the equalizer identification process. We describe our architecture and demonstrate its performance with measured results when applied to a National Semiconductor ADC081000.